The desktop user interface¶
EduMIPS64 ships as a Java desktop application based on Swing. This chapter describes the desktop GUI, which is inspired by the WinMIPS64 user interface. In fact, the main window is identical, except for some menus.
This chapter also documents the command line options that are supported by the desktop JAR. The same JAR can be run as a graphical application or in headless / CLI mode (see Command line options).
The EduMIPS64 main window is composed by a menu bar and six frames, showing different aspects of the simulation. There’s also a status bar, that has the double purpose to show the content of memory cells and registers when you click them and to notify the user that the simulator is running when the simulation has been started but verbose mode is not selected.
The status bar also shows the CPU status. It can show one of the following four states:
READY The CPU hasn’t executed any instructions (no program is loaded).
RUNNING The CPU is executing a series of instructions.
STOPPING The CPU has found a termination instruction, and is executing the instructions that are already in the pipeline before terminating the execution.
HALTED The CPU is stopped: a program just finished running.
Note that the CPU status is different from the simulator status. The simulator may execute a number of CPU cycles and then stop executing, allowing the user to inspect memory and registers: in this state, between CPU cycles, the CPU stays in RUNNING or STOPPING state. Once the CPU reaches the HALTED state, the user cannot run any CPU cycle without loading a program again (the same program, or a different one).
There are more details in the following sections.
Frames¶
The GUI is composed by seven frames, six of which are visible by default, and one (the I/O frame) is hidden.
Cycles¶
The Cycles frame shows the evolution of the execution flow during time, showing for each time slot which instructions are in the pipeline, and in which stage of the pipeline they are located.
Registers¶
The Registers frame shows the content of each register. By left-clicking on them you can see in the status bar their decimal (signed) value, while double-clicking on them will pop up a dialog that allows the user to change the value of the register.
Statistics¶
The Statistics frame shows some statistics about the program execution.
Note that during the last execution cycle the cycles counter is not incremented, because the last execution cycle is not a full CPU cycle but rather a pseudo-cycle whose only duties are to remove the last instruction from the pipeline and increment the counter of executed instructions.
The Statistics frame also displays L1 cache statistics when the cache simulator is enabled:
L1I Reads - Number of read accesses to the L1 instruction cache
L1I Read Misses - Number of read misses in the L1 instruction cache
L1D Reads - Number of read accesses to the L1 data cache
L1D Read Misses - Number of read misses in the L1 data cache
L1D Writes - Number of write accesses to the L1 data cache
L1D Write Misses - Number of write misses in the L1 data cache
These statistics help analyze cache performance and understand memory access patterns in your program. Cache misses indicate when the processor needs to access slower main memory instead of the faster cache.
Pipeline¶
The Pipeline frame shows the actual status of the pipeline, showing which instruction is in which pipeline stage. Different colors highlight different pipeline stages.
Memory¶
The Memory frame shows memory cells content, along with labels and comments taken from the source code. Memory cells content, like registers, can be modified double-clicking on them, and clicking on them will show their decimal value in the status bar. The first column shows the hexadecimal address of the memory cell, and the second column shows the value of the cell. Other columns show additional info from the source code.
Code¶
The Code window shows the instructions loaded in memory. The first column shows the address of the instruction, while the second column shows the hexadecimal representation of the instructions. Other columns show additional info taken from the source code.
Input/Output¶
The Input/Output window provides an interface for the user to see the output that the program creates through the SYSCALLs 4 and 5. Actually it is not used for input, as there’s a dialog that pops up when a SYSCALL 3 tries to read from standard input, but future versions will include an input text box.
Dialogs¶
Dialogs are used by EduMIPS64 to interact with the user in many ways. Here’s a summary of the most important dialogs:
Settings¶
In the Settings dialog various aspects of the simulator can be configured. Clicking on the “OK” button will cause the options to be saved, while clicking on “Cancel” (or simply closing the window) will cause the changes to be ignored. Don’t forget to click “OK” if you want to save your changes. The “Reset to defaults” button restores all settings to their default values after asking for confirmation; this is useful to recover from a misconfigured simulator without having to change each option manually.
The Main Settings tab allow to configure forwarding and the number of steps in the Multi Cycle mode.
The Behavior tab allow to enable or disable warnings during the parsing phase, the “Sync graphics with CPU in multi-step execution” option, when checked, will synchronize the frames’ graphical status with the internal status of the simulator. This means that the simulation will be slower, but you’ll have an explicit graphical feedback of what is happening during the simulation. If this option is checked, the “Interval between cycles” option will influence how many milliseconds the simulator will wait before starting a new cycle. Those options are effective only when the simulation is run using the “Run” or the “Multi Cycle” options from the Execute menu.
The last two options set the behavior of the simulator when a synchronous exception is raised. If the “Mask synchronous exceptions” option is checked, the simulator will ignore any Division by zero or Integer overflow exception. If the “Terminate on synchronous exception” option is checked, the simulation will be halted if a synchronous exception is raised. Please note that if synchronous exceptions are masked, nothing will happen, even if the termination option is checked. If exceptions are not masked and the termination option is not checked, a dialog will pop out, but the simulation will go on as soon as the dialog is closed. If exceptions are not masked and the termination option is checked, the dialog will pop out, and the simulation will be stopped as soon as the dialog is closed.
The last tab allows to change the appearance of the user interface. There are options to change the colors associated to the different pipeline stages, an option to choose whether memory cells are shown as long or double values and an option to set the UI font size.
The Cache tab allows you to configure the L1 cache simulator settings:
L1 Data Cache Size - Size of the L1 data cache in bytes (default: 1024)
L1 Instruction Cache Size - Size of the L1 instruction cache in bytes (default: 1024)
L1 Data Cache Block Size - Size of each cache block in bytes (default: 16)
L1 Instruction Cache Block Size - Size of each cache block in bytes (default: 16)
L1 Data Cache Associativity - Number of cache ways, determining cache organization (default: 1)
L1 Instruction Cache Associativity - Number of cache ways, determining cache organization (default: 1)
These settings allow you to experiment with different cache configurations to understand their impact on program performance. The cache simulator models separate L1 data and instruction caches, which is common in modern processors.
Note that the UI scaling with font size is far from perfect, but it should be enough to make the simulator usable with high-resolution displays (e.g., 4k).
L1 Cache Simulator¶
EduMIPS64 includes an integrated L1 cache simulator that models the behavior of separate instruction and data caches. The cache simulator operates automatically during program execution and provides detailed statistics about cache performance.
The cache simulator models:
L1 Instruction Cache - Caches instruction fetches from memory
L1 Data Cache - Caches data reads and writes from memory operations
Each cache can be independently configured with different parameters:
Size - Total capacity of the cache in bytes
Block Size - Size of each cache line in bytes (also called cache block)
Associativity - Number of ways in the cache set (1 = direct-mapped, >1 = set-associative)
The cache simulator uses a Least Recently Used (LRU) replacement policy for set-associative caches. Cache statistics are updated in real-time during execution and displayed in the Statistics frame.
Cache performance can significantly impact program execution time, especially for programs with poor memory locality. Use the cache simulator to:
Analyze memory access patterns in your programs
Experiment with different cache configurations
Understand the performance impact of cache misses
Learn about cache behavior in real processors
The cache configuration can be changed through the Settings dialog (Cache tab) and takes effect when the simulation is reset.
Forwarding¶
EduMIPS64 models a 5-stage MIPS64 pipeline (IF, ID, EX, MEM, WB) and supports optional data forwarding to reduce the number of stalls caused by Read After Write (RAW) hazards. Forwarding can be toggled from the Main Settings tab of the Settings dialog.
When forwarding is disabled, source registers are read from the register file in the ID stage. An instruction that reads a register written by one of the two previous instructions must wait until the producer reaches WB, which results in two RAW stalls.
When forwarding is enabled, the simulator implements two forwarding paths that match the canonical Hennessy & Patterson MIPS pipeline:
EX → EX: an ALU result produced at the end of EX can be forwarded to the EX input of the immediately following instruction (no stall).
MEM → EX: a value produced at the end of MEM (typically a load result, or an ALU result one cycle later) can be forwarded to the EX input of an instruction in EX (no stall).
There is no EX → ID forwarding path and, by symmetry, no MEM → ID
forwarding path. This has two visible consequences for branch and
register-based jump instructions (BEQ, BNE, BEQZ, BNEZ,
BGEZ, JR, JALR), which evaluate their condition or target in
the ID stage:
ALU → branch: if the source register of the branch is being produced by the immediately preceding ALU instruction, the value is not yet available at the start of ID, and the simulator inserts one RAW stall.
Load → branch: if the source register of the branch is being produced by the immediately preceding load, the value is only available at the end of MEM, while the branch needs it at the start of ID. The simulator inserts two RAW stalls: this is the union of the load-use hazard (one stall) and the branch-in-ID hazard (one extra stall).
Both behaviors match the description in Hennessy & Patterson.
The following table summarises the typical RAW stalls for the most common producer/consumer pairs:
Producer → consumer |
No forwarding |
With forwarding |
|---|---|---|
ALU → ALU |
2 |
0 |
ALU → store (data operand) |
2 |
0 |
Load → ALU (load-use) |
2 |
1 |
ALU → branch / register jump |
2 |
1 |
Load → branch / register jump |
2 |
2 |
Dinero Frontend¶
The Dinero Frontend dialog allows to feed a DineroIV process with the trace file internally generated by the execution of the program. In the first text box there is the path of the DineroIV executable, and in the second one there must be the parameters of DineroIV.
The lower section contains the output of the DineroIV process, from which you can take the data that you need.
Help¶
The Help dialog brings up the on-line manual, which is an HTML copy of this document.
Command line options¶
Several command line options are available. They are described in the following list, with the long name enclosed in round brackets. Long and short names can be used in the same way.
-v (–version) prints the simulator version and exits.
-h (–help) prints a help message with a brief summary of command line options, then exits.
-f (–file) filename opens filename in the simulator
-r (–reset) resets the stored configuration to the default values
-d (–debug) enters Debug mode
-hl (–headless) Runs EduMIPS64 in headless mode (no gui)
–verbose enables verbose mode in headless/CLI mode, showing detailed simulator output such as start/end messages and progress indicators. By default, the CLI runs in quiet mode, which minimizes simulator output to avoid confusion with program output (e.g., from SYSCALL 5).
The –debug flag has the effect to activate Debug mode. In this mode, a new frame is available, the Debug frame, and it shows the log of internal activities of EduMIPS64. It is not useful for the end user, it is meant to be used by EduMIPS64 developers.